|Present||Associate Professor, Utah State University ‐ Electrical and Computer Engineering|
An improved fault-tolerant routing algorithm for a Network-on-Chip derived with ...
Science of Computer Programming (2016)
A fault-tolerant routing algorithm in Network-on-Chip (NoC) architectures provides adaptivity for on-chip communications. Adding fault-tolerance adaptivity to a routing algorithm ...
Stochastic Model Checking of Genetic Circuits
ACM Journal on Emerging Technologies in Computing Systems (JETC) - Special Issue on Computational Synthetic Biology and Regular Papers (2014)
Synthetic genetic circuits have a number of exciting potential applications such as cleaning up toxic waste, hunting and killing tumor ...
Conference Papers (4)
Formal Analysis of a Fault-Tolerant Routing Algorithm for a Network-on-Chip
Formal Methods for Industrial Critical System (2014)
A fault-tolerant routing algorithm in Network-on-Chip architectures provides adaptivity for on-chip communications. Adding fault-tolerance adaptivity to a routing algorithm increases ...
Utilizing Stochastic Model Checking to Analyze Genetic Circuits
IEEE Symposium on Computational Intelligence in Bioinformatics and Computational Biology (CIBCB) (2012)
When designing and analyzing genetic circuits, researchers are often interested in the probability of the system reaching a given state ...
A Fault-Tolerant Routing Algorithm for a Network-on-Chip Using a Link ...
VirtualWorldwide Forum for PhD researchers in Electronic Design Automantion (2011)
Adaptive routing is a sensible approach to enhance fault-tolerance in Network-on-Chip (NoC) architectures, but can cause deadlock if implemented improperly. ...