"Leakage Current Recovery in SRAM After AC Stressing" by Cesar Payan

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Leakage Current Recovery in SRAM After AC Stressing

2003 IEEE International Integrated Reliability Workshop Final Report

Cesar Payan, Cypress Semiconductor
Santosh Kumar, Cypress Semiconductor
Ajit Thupil, Cypress Semiconductor
Sridhar Kasichainula, Extreme Networks
William B. Knowlton, Boise State University

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Document Type

Conference Proceeding

Publication Date

1-1-2003

DOI

http://dx.doi.org/10.1109/IRWS.2003.1283303

Disciplines

Electrical and Computer Engineering

Abstract

A recovery of sub-threshold current, measured as standby current has been seen on Static Random Access Memory (SRAM) devices after AC stress. A theoretical model is presented to explain the observed data in this paper. A trapped charge model is proposed for decrease in subthreshold current leading to lower observed standby current on continuous negative unipolar write stress. Several mechanisms have been proposed earlier such as Poole-Frenkel enhanced emission from traps, trap assisted tunneling, and band-to band tunneling to explain possible source of off current [5,9].

Citation Information

Cesar Payan, Santosh Kumar, Ajit Thupil, Sridhar Kasichainula, et al.. "Leakage Current Recovery in SRAM After AC Stressing" 2003 IEEE International Integrated Reliability Workshop Final Report (2003)
Available at: http://works.bepress.com/william_knowlton/46/