As the number of transistors in microprocessors increases, their power demand increases accordingly. This poses design challenges for their power supply module called VRM (Voltage Regulator Module) especially when operated at sub voltage range. This paper presents the design of a new multiphase multi-interleaving topology that addresses these challenges. A lab scaled hardware prototype of the new topology shows improved load regulation, output voltage ripple and dynamic response time compared to a commercially available power supply module.
Available at: http://works.bepress.com/taufik/38/