Skip to main content
Top-gated graphene field-effect-transistors formed by decomposition of SiC
Department of Physics and Astronomy Faculty Publications
  • Y. Q. Wu
  • P. D. Ye
  • M. A. Capano
  • Y. Xuan
  • Y. Sui
  • M. Qi
  • J. A. Cooper
  • T. Shen
  • D. Pandey
  • G. Prakash
  • R. Reifenberger
Published in:
Applied Physics Letters 92,9 (2008) 092102 1-3;
Top-gated, few-layer graphene field-effect transistors (FETs) fabricated on thermally decomposed semi-insulating 4H-SiC substrates are demonstrated. Physical vapor deposited SiO2 is used as the gate dielectric. A two-dimensional hexagonal arrangement of carbon atoms with the correct lattice vectors, observed by high-resolution scanning tunneling microscopy, confirms the formation of multiple graphene layers on top of the SiC substrates. The observation of n-type and p-type transition further verifies Dirac Fermions' unique transport properties in graphene layers. The measured electron and hole mobilities on these fabricated graphene FETs are as high as 5400 and 4400 cm(2)/V s, respectively, which are much larger than the corresponding values from conventional SiC or silicon. (C) 2008 American Institute of Physics.
  • Physics, Applied
Date of this Version
Citation Information
Y. Q. Wu, P. D. Ye, M. A. Capano, Y. Xuan, et al.. "Top-gated graphene field-effect-transistors formed by decomposition of SiC" (2008)
Available at: