Semiconductor Wafer Processing System With Vertically-Stacked Process Chambers and Single-Axis Dual-Wafer Transfer SystemUnited States Patent Number: 6,610,150
AbstractA semiconductor wafer processing system including a multi-chamber module having vertically-stacked semiconductor wafer process chambers and a loadlock chamber dedicated to each semiconductor wafer process chamber. Each process chamber includes a chuck for holding a wafer during wafer processing. The multi-chamber modules may be oriented in a linear array. The system further includes an apparatus having a dual-wafer single-axis transfer arm including a monolithic arm pivotally mounted within said loadlock chamber about a single pivot axis. The apparatus is adapted to carry two wafers, one unprocessed and one processed, simultaneously between the loadlock chamber and the process chamber. A method utilizing the disclosed system is also provided.
Number of Pages27
Citation InformationRichard N. Savage, Frank S. Menagh, Helder R. Carvalheira, Philip A. Troiani, et al.. "Semiconductor Wafer Processing System With Vertically-Stacked Process Chambers and Single-Axis Dual-Wafer Transfer System" United States Patent Number: 6,610,150 (2003)
Available at: http://works.bepress.com/rsavage/13/