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Article
Vertical Nanowire Transistors with Low Leakage Current
Applied Physics Letters
  • Jie Chen, Hahn-Meitner Institut Berlin
  • M. C. Lux-Steiner, Hahn-Meitner Institut Berlin
  • Rolf Kӧnenkamp, Portland State University
  • S. Klaumünzer, Hahn-Meitner Institut Berlin
Document Type
Article
Publication Date
8-23-2004
Subjects
  • Transistors,
  • Semiconductors,
  • Nanostructured materials,
  • Nanowires
Disciplines
Abstract

A vertical field-effect transistor based on semiconductor nanowires is reported. The fabrication of the device uses a self-supporting flexible nanostructured polymer foil as a template and an electrochemical growth technique for the preparation of the semiconductor. The fabrication process is substantially simpler, and the mechanical robustness is strongly increased as compared to the original device. The channel region of the transistor has a diameter of ∼100 nm and a length of ∼50 nm. Operation in the hole depletion mode allows a change of the transfer conductance by ∼50% when the gate voltages is changed in the range ∓1 V. The gate leakage current is ∼600 fA per transistor. The overall layout is suitable for optical pixel control on large-area flexible substrates.

Description

Article appears in Applied Physics Letters (http://apl.aip.org/) and is copyrighted (2004) by the American Institute of Physics. This article may be downloaded for personal use only. Any other use requires prior permission of the author and the American Institute of Physics.

DOI
10.1063/1.1784037
Persistent Identifier
http://archives.pdx.edu/ds/psu/7221
Citation Information
Chen, J. J., Klaumünzer, S. S., Lux-Steiner, M. C., & Könenkamp, R. R. (2004). Vertical nanowire transistors with low leakage current. Applied Physics Letters, 85(8), 1401-1403