Article
A Distributed and Shared Register File for a Multiprocessor-on-Chip to Support Real-Time Applications
2006 6th International Workshop on System on Chip for Real Time Applications
Document Type
Article
Publication Date
4-16-2007
Abstract
The authors have developed 116 times 32-bit 1-write-port, 2-read-port, 4-read/write-port register file to be shared by five processors in a multiprocessor-on-a-chip, supporting conditional operands in both read and write operations. This register file provides the underlying SoC with an inter-processor transparent communication layer in which each processor shares a distributed (register) address space (comprised of 32 registers) with eight other processors to reach a tightly-coupled array of processors with high-performance inter-processor communication facilitating real-time applications
Disciplines
Rights
© 2007 IEEE
Citation Information
Nozar Tabrizi and Nader Bagherzadeh. "A Distributed and Shared Register File for a Multiprocessor-on-Chip to Support Real-Time Applications" 2006 6th International Workshop on System on Chip for Real Time Applications (2007) Available at: http://works.bepress.com/nozar-tabrizi/2/
ISBN: 1-4244-0898-9