In this paper, analytical models of on-chip power noise induced by an on-chip linear voltage regulator module (VRM) circuit with a high-speed output buffer are proposed. Based on the piecewise linear approximated MOSFET I-V curve model, closed-form equations for the on-chip power noise induced by an on-chip low-dropout regulator are derived. The accuracy of the proposed analytical model is validated by SPICE simulation with a 110-nm CMOS technology library. Based on the proposed analytical models, the impacts of VRM design parameters on VRM output noise induced by load current and external noises are analyzed. Because self-impedance at the VRM output and external noise transfer functions share a common resonant frequency, the on-chip power noise is minimized by avoiding the resonant frequency from peak frequencies of noise source spectrums. The larger on-chip decoupling capacitance at load reduces, the overall on-chip VRM output noise. While the larger pass transistor size reduces the on-chip VRM output noise induced by the reference voltage fluctuation, it increases the noise generated by off-chip power fluctuation. The reference voltage node needs to be carefully designed, as opposed to an off-chip power distribution network, due to its dominant impact on the on-chip VRM output noise. The analysis results based on the proposed model provide an in-depth understanding of and useful design guidance for on-chip power noise induced by the on-chip linear VRM with a high-speed output buffer.
- Capacitance,
- Electric current regulators,
- Electric load management,
- Integrated circuit design,
- Mathematical models,
- Natural frequencies,
- Piecewise linear techniques,
- SPICE,
- System-on-chip,
- Transistors,
- Voltage regulators,
- Integrated circuit modeling,
- Linear voltage regulators,
- Load modeling,
- Low-dropout regulators,
- On-chip power distribution,
- On-chip power noise,
- Output Buffer,
- Analytical models,
- High-speed output buffer,
- On-chip linear voltage regulator module (VRM),
- On-chip low-dropout (LDO) regulator,
- On-chip power distribution network (PDN),
- Regulators
Available at: http://works.bepress.com/jun-fan/310/
This work was supported by the National Science Foundation under Grant IIP-1440110.