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Reducing Common-Mode Voltage in Three-Phase Sine-Triangle PWM with Interleaved Carriers
Proceedings of the 25th Annual IEEE Applied Power Electronics Conference and Exposition (2010, Palm Springs, CA)
  • Jonathan W. Kimball, Missouri University of Science and Technology
  • Maciej Jan Zawodniok, Missouri University of Science and Technology
Abstract

Interleaving PWM waveforms is a proven method to reduce ripple in dc-dc converters. The present work explores interleaving for three-phase motor drives. Fourier analysis shows that interleaving the carriers in conventional uniform PWM significantly reduces the common-mode voltage. New DSP hardware supports interleaving directly with changes to just two registers at setup time, so no additional computation time is needed during operation. The common-mode voltage reduction ranges from 36% at full modulation to 67% when idling with zero modulation. Third harmonic injection slightly reduces the advantage (to 26% at full modulation). However, the maximum RMS common-mode voltage is still less than 20% of the bus voltage under all conditions. Low-voltage experimental results support the findings.

Meeting Name
25th Annual IEEE Applied Power Electronics Conference and Exposition (2010: Feb. 21-25, Palm Springs, CA)
Department(s)
Electrical and Computer Engineering
Sponsor(s)
ITW Military GSE
National Science Foundation (U.S.). Industry/University Cooperative Research Centers Program
Comments
This work was supported by ITW Military GSE and the National Science Foundation I/UCRC on Intelligent Maintenance Systems.
Keywords and Phrases
  • DC-DC Power Convertors,
  • PWM Power Convertors,
  • Digital Signal Processing Chips,
  • Fourier Analysis,
  • Additional Computation Time,
  • Bus Voltage,
  • Common Mode Voltage,
  • DSP Hardware,
  • Low-Voltage,
  • Set-Up Time,
  • Third Harmonic,
  • Three Phase Motor,
  • Uniform PWM,
  • Wave Forms,
  • Zero Modulation,
  • Electric Drives,
  • Pulse Modulation,
  • Pulse Width Modulation,
  • Power Electronics
International Standard Book Number (ISBN)
978-1424447824
Document Type
Article - Conference proceedings
Document Version
Final Version
File Type
text
Language(s)
English
Rights
© 2010 Institute of Electrical and Electronics Engineers (IEEE), All rights reserved.
Publication Date
2-1-2010
Publication Date
01 Feb 2010
Citation Information
Jonathan W. Kimball and Maciej Jan Zawodniok. "Reducing Common-Mode Voltage in Three-Phase Sine-Triangle PWM with Interleaved Carriers" Proceedings of the 25th Annual IEEE Applied Power Electronics Conference and Exposition (2010, Palm Springs, CA) (2010) p. 1508 - 1513 ISSN: 1048-2334
Available at: http://works.bepress.com/jonathan-kimball/85/