System verification is one of the most critical tasks into the process of engineered system design. This process is time-consuming and prone with errors when a limited set of scenarios is evaluated to guarantee the correct functionality of the system. Therefore, novel design approaches and tools based on a rigorous framework for analysis, verification, and testing are very much needed. This paper provides such a framework where system properties are verified and modeled with respect to the assumptions on the environment where components and (sub)systems' performances are guaranteed under these assumptions. To validate the proposed approach, this paper provides a case study to demonstrate how the proposed methodology reduces design complexity and presents a formal argument to assess the quality of the design.