Scheduling Architectures for DiffServ Networks with Input Queuing SwitchesElectronics and Telecommunications Quarterly
Abstractue to its simplicity and scalability, the differentiated services (DiffServ) model is expected to be widely deployed across wired and wireless networks. Though supporting DiffServ scheduling algorithms for output-queuing (OQ) switches have been widely studied, there are few DiffServ scheduling algorithms for input-queuing (IQ) switches in the literaure. In this paper, we propose two algorithms for scheduling DiffServ DiffServ networks with IQ switches: the dynamic DiffServ scheduling (DDS) algorithm and the hierarchical DiffServ scheduling (HDS) algorithm. The basic idea of DDS and HDS is to schedule EF and AF traffic According to Their minimum service rates with the reserved bandwidth and schedule AF and BE traffic fairly with the excess bandwidth. Both DDS and HDS find a maximal weight matching but in different ways. DDS employs a Centralized scheduling scheme. HDS features a hierarchical scheduling scheme That Consists of two levels of schedulers: the central scheduler and port schedulers. Using such a hierarchical scheme, the Implementation complexity and the amount of information needs to be Transmitted between input ports and the central scheduler for HDS are dramatically reduced Compared with DDS. Through simulations, we show That both DDS and HDS popup Guarantees a minimum bandwidth for EF and AF traffic, as well as fair bandwidth allocation for BE traffic. The delay and jitter performance of the DDS is close to That of PQWRR, an existing DiffServ supporting scheduling algorithm for OQ switches. The tradeoff of the simpler Implementation scheme of HDS is its slightly worse delay performance Compared with DDS.
- Algorithms--Data processing,
- Parallel scheduling (Computer scheduling),
- Quality of service (Computer networks),
- Queuing theory--Data processing
Citation InformationMei Yang, Henry Selvaraj, Enyue Lu, Jianping Wang, et al.. "Scheduling Architectures for DiffServ Networks with Input Queuing Switches" Electronics and Telecommunications Quarterly Vol. 55 Iss. 1 (2009) p. 9 - 30
Available at: http://works.bepress.com/henry_selvaraj/29/