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70-Gb/s amplitude-shift-keyed system with 10-GHz clock recovery circuit using duty cycle division multiplexing
Photonic Network Communications (2009)
  • Ghafour Amouzad Mahdiraji
Abstract

The performance of ASK over DCDM for up to seven channels is reported. The aggregate bit rate of 70 Gb/s is achieved with only 160-GHz modulation bandwidth. The clock and data recovery are realized at 10-GHz clock rate, which is very economic and efficient. At 7 × 10 Gb/s, the worst receiver sensitivity of−10 dBm, OSNR of 41.5 dB and chromatic dispersion tolerance of ±17 ps/nm are achieved. Whereas, for the best channel, the receiver sensitivity,OSNR, and chromatic dispersion tolerance are −23.5dBm, 29dB, and ±36 ps/nm, respectively.

Keywords
  • Optical communications,
  • Multiplexing,
  • Duty cycle.
Publication Date
2009
Citation Information
Ghafour Amouzad Mahdiraji. "70-Gb/s amplitude-shift-keyed system with 10-GHz clock recovery circuit using duty cycle division multiplexing" Photonic Network Communications Vol. 19 Iss. 3 (2009)
Available at: http://works.bepress.com/ghafour_mahdiraji/7/