This paper presents improvements made to a complimentary metal–oxide–semiconductor (CMOS) fabrication laboratory course to increase student learning and student impact (enrollment). The three main improvements to the course discussed include: 1) use of a two-mask MOS process that significantly reduced the time students took previously to design, fabricate, and verify the electrical properties of a metal–oxide–semiconductor field-effect transistor (MOSFET) process; 2) students' use of a semicustom integrated circuit (IC) design that significantly reduced the average design and processing time of previous years; and 3) development and implementation of a system of course prerequisites, which allowed a larger number of students to enroll in the course.