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Article
A Circuit Model for ESD Performance Analysis of Printed Circuit Boards
Proceedings of the 2008 Electrical Design of Advanced Packaging and Systems Symposium, 2008
  • Byong-Su Seol
  • Jong-Sung Lee
  • Jae-Deok Lim
  • Hyungseok Lee
  • HarkByeong Park
  • Argha Nandy
  • David Pommerenke, Missouri University of Science and Technology
Abstract
This paper provides a SPICE-compatible circuit model for characterizing electrostatic discharge (ESD) clamping performance of protection devices mounted on printed circuit boards (PCBs). An equivalent circuit model for a commercial ESD generator is introduced and a simulation methodology of an ESD protection device with non-linear resistance characteristic using voltage controlled current source is described. These models combined to create a full circuit model with a PCB model in a SPICE-like circuit simulator. Comparison results between the simulated and measured are presented to verify the accuracy of the proposed circuit model. A trade-off analysis between the ESD clamping performance and signal integrity with the ESD protection device in high-speed applications is also presented as a case study.
Meeting Name
2008 Electrical Design of Advanced Packaging and Systems Symposium, 2008
Department(s)
Electrical and Computer Engineering
Document Type
Article - Conference proceedings
Document Version
Final Version
File Type
text
Language(s)
English
Rights
© 2008 Institute of Electrical and Electronics Engineers (IEEE), All rights reserved.
Publication Date
12-1-2008
Citation Information
Byong-Su Seol, Jong-Sung Lee, Jae-Deok Lim, Hyungseok Lee, et al.. "A Circuit Model for ESD Performance Analysis of Printed Circuit Boards" Proceedings of the 2008 Electrical Design of Advanced Packaging and Systems Symposium, 2008 (2008)
Available at: http://works.bepress.com/david-pommerenke/6/