While the equivalent series inductance (ESL) of multi-layer ceramic capacitors is widely used for power integrity analysis, the definition of ESL is ambiguous. Its value depends on how the capacitor is mounted on the PCB and on coupling to the nearby pads, traces, vias, and return plane. A single value for ESL is not sufficient to quantify the behavior of a capacitor in a broad number of power distribution network (PDN) designs and will lead to errors in the simulated PDN impedance. The impact of errors in ESL is analyzed in the following paper using measurements and simulations. The dependence of ESL on the layout is demonstrated using full-wave simulations. Measurements of 0402 and 0201 capacitors show that using the datasheet ESL can lead to up to 47% overestimation of the value of the total connection inductance, Labove. Test PDN structures with various stackups were analyzed to quatify the error in the total impedance due to errors in ESL. Results show that errors in ESL can lead to a 26% overestimation in the overall PDN impedance in the studied examples. Overestimation of ESL may cause more capacitors to be put on the board than needed.