Article
Race Conditions among Protection Devices for a High Speed I/O Interface
Proceedings of the 42nd Annual Electrical Overstress/Electrostatic Discharge Symposium (2020, Reno, NV)
Abstract
The ESD coupling path and on-board impedances strongly affect the ESD rise time seen on a PCB trace. Possible race conditions between external and on-die ESD protection were studied using measurement-based models of the transient response and on-board passives. Results show the interplay of rise time and protection turn-on can prevent the external TVS from responding in time.
Meeting Name
42nd Annual EOS/ESD Symposium (2020: Sep. 13-18, Reno, NV)
Department(s)
Electrical and Computer Engineering
Research Center/Lab(s)
Electromagnetic Compatibility (EMC) Laboratory
Comments
National Science Foundation, Grant IIP-1916535
International Standard Book Number (ISBN)
978-172819461-5
Document Type
Article - Conference proceedings
Document Version
Citation
File Type
text
Language(s)
English
Rights
© 2020 Institute of Electrical and Electronics Engineers (IEEE), All rights reserved.
Publication Date
11-10-2020
Publication Date
10 Nov 2020
Disciplines
Citation Information
Jianchi Zhou, Javad Soleiman Meiguni, Sergej Bub, Steffen Holland, et al.. "Race Conditions among Protection Devices for a High Speed I/O Interface" Proceedings of the 42nd Annual Electrical Overstress/Electrostatic Discharge Symposium (2020, Reno, NV) (2020) p. 1 - 6 ISSN: 0739-5159 Available at: http://works.bepress.com/daryl-beetner/111/