In this paper, a novel de-embedding methodology is proposed for through silicon via (TSV) characterization by using a set of simple yet efficient test patterns. For all the test patterns, full wave models are developed and the electrical performance of the test patterns is analyzed thoroughly. Furthermore, broadband measurements are performed for the test patterns to verify the accuracy of the developed full wave models up to 40 GHz. Correlation between measurement and simulation results is discussed after optimizing the full wave models based on scanning electron microscope measurement. Analysis of measurement error is available as well. The proposed de-embedding method is applied to both the simulation and measurement results to extract the electrical characteristics of the TSV pair. Good agreement between the de-embedded results with analytical solution and the full-wave simulation for a standalone TSV pair indicates that the proposed de-embedding method works effectively up to 40 GHz. Finally, sensitivity analysis with regard to manufacturing tolerance of the test patterns to the final de-embedded results is performed.