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Analysis of Voltage Regulator Module (VRM) Noise Coupling to High-Speed Signals with VRM Via Designs
2023 Joint Asia-Pacific International Symposium on Electromagnetic Compatibility and International Conference on ElectroMagnetic Interference and Compatibility, APEMC/INCEMIC 2023
  • Junho Joo
  • Manish K. Mathew
  • Soumya Singh
  • Seema Pk
  • Arun Chada
  • Bhyrav Mutnury
  • Chulsoon Hwang, Missouri University of Science and Technology
  • DongHyun Kim, Missouri University of Science and Technology
Abstract

The Physical Noise Coupling Mechanism between Voltage Regulator Module (VRM) Noise Coupling to High-Speed Signal Traces is Analyzed and Different Noise Reduction Methods Are Analyzed for the First Time. the Rapid Switching of Field Effect Transistors (FETs) Creates an Unintentional Coupling Region Around the VRM. as High-Speed Traces Are Often Routed in the Inner Signal Layers of Printed Circuit Boards (PCBs) as Striplines for Signal Integrity, the VRM Switching Noise is Mainly Coupled from Noisy Power Vias to the Victim Traces Routed Around the VRM Region. to Analyze Different Coupling Reduction Methods in Practical High-Speed Channels, a Simplified PCB Design based on a High-Speed Server Platform is Proposed. Case Studies under Various Conditions Verifies the Most Effective VRM Noise Coupling Reduction Method. Different Design Parameters that Influence the VRM Noise Coupling Are Analyzed to Provide a Design Guide for High-Speed Channel Designers.

Department(s)
Electrical and Computer Engineering
Keywords and Phrases
  • PDN via design,
  • via to trace coupling,
  • voltage regulator module noise coupling,
  • VRM power distribution network
Document Type
Article - Conference proceedings
Document Version
Citation
File Type
text
Language(s)
English
Rights
© 2023 Institute of Electrical and Electronics Engieners, All rights reserved.
Publication Date
1-1-2023
Publication Date
01 Jan 2023
Citation Information
Junho Joo, Manish K. Mathew, Soumya Singh, Seema Pk, et al.. "Analysis of Voltage Regulator Module (VRM) Noise Coupling to High-Speed Signals with VRM Via Designs" 2023 Joint Asia-Pacific International Symposium on Electromagnetic Compatibility and International Conference on ElectroMagnetic Interference and Compatibility, APEMC/INCEMIC 2023 (2023)
Available at: http://works.bepress.com/chulsoon-hwang/139/