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FastRoute: An Efficient and High-Quality Global Router
VLSI Design
  • Min Pan, Synopsys Inc.
  • Yue Xu, Iowa State University
  • Yanheng Zhang, Cadence Design Systems Inc.
  • Chris Chong-Nuen Chu, Iowa State University
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Modern large-scale circuit designs have created great demand for fast and high-quality global routing algorithms to resolve the routing congestion at the global level. Rip-up and reroute scheme has been employed by the majority of academic and industrial global routers today, which iteratively resolve the congestion by recreating the routing path based on current congestion. This method is proved to be the most practical routing framework. However, the traditional iterative maze routing technique converges very slowly and easily gets stuck at local optimal solutions. In this work, we propose a very efficient and high-quality global router—FastRoute. FastRoute integrates several novel techniques: fast congestion-driven via-aware Steiner tree construction, 3-bend routing, virtual capacity adjustment, multisource multi-sink maze routing, and spiral layer assignment. These techniques not only address the routing congestion measured at the edges of global routing grids but also minimize the total wirelength and via usage, which is critical for subsequent detailed routing, yield, and manufacturability. Experimental results show that FastRoute is highly effective and efficient to solve ISPD07 and ISPD08 global routing benchmark suites. The results outperform recently published academic global routers in both routability and runtime. In particular, for ISPD07 and ISPD08 global routing benchmarks, FastRoute generates 12 congestion-free solutions out of 16 benchmarks with a speed significantly faster than other routers.

This is an article from VLSI Design 2012 (2012): 608362, doi: 10.1155/2012/608362. Posted with permission.

This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.
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Min Pan et al.
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Min Pan, Yue Xu, Yanheng Zhang and Chris Chong-Nuen Chu. "FastRoute: An Efficient and High-Quality Global Router" VLSI Design Vol. 2012 (2012) p. 608362-1 - 608362-18
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