Copper through wafer interconnects (TWIs) have become a viable solution to providing interconnectivity between stacked die. In a world where minimizing chip real estate while increasing functionality is the goal for further miniaturization of electronics, TWIs hold a key role as new packaging schemes become critical for overall higher density. Little is known, however, about the impacts of mismatched coefficients of thermal expansion (CTEs) inherent to the materials used in their construction. CTE differences, if left unresolved, can pose reliability issues during TWI operation. This research focuses on providing insight into the stress levels experienced by TWI materials through finite element analysis to gain a better understanding of the possible failure mechanisms associated with the CTE differences.
This document was originally published by IEEE in 56th Electronic Components and Technology Conference, 2006. Proceedings. Copyright restrictions may apply. DOI: 10.1109/ECTC.2006.1645756
Available at: http://works.bepress.com/amy_moll/6/