Dr. Vishal Saxena graduated from the Ph.D. program in Electrical and Computer Engineering at Boise State University, and joined the faculty at Boise State in 2010. His undergraduate studies were completed at the Indian Institute of Technology in Madras, India. During his graduate studies, Dr. Saxena was a teaching assistant for CMOS Analog IC Design, Advanced Analog IC Design, Mixed-Signal IC Design, and Memory Circuit Design. His research interests include analog/mixed-signal and RF IC design, including high-speed data converters, delta-sigma modulation, phase-locked loops, and transceivers. He has been a reviewer for the IEEE Transactions on Circuits and Systems-II: Express Briefs.
Articles & Proceedings
Reconfigurable Threshold Logic Gates using Memristive Devices (with Adrian Rothenbuhler, Thanh Tran, Elisa H. Barney Smith, and Kristy A. Campbell), Journal of Low Power Electronics and Applications (2013)
We present our design exploration of reconfigurable Threshold Logic Gates (TLG) implemented using silver–chalcogenide memristive...
Reconfigurable Threshold Logic Gates Using Memristive Devices (with Thanh Tran, Adrian Rothenbuhler, Elisa Barney Smith, and Kristy A. Campbell), 2012 IEEE Subthreshold Microelectronics Conference (SubVT) (2012)
We present our early design exploration of reconfigurable Threshold Logic Gates (TLG) implemented using Silver-chalcogenide...
A 1 GS/s, 31 MHz BW, 76.3 dB Dynamic Range, 34 mW CT-ΔΣ ADC with 1.5 Cycle Quantizer Delay and Improved STF (with Sakkarapani Balagopal), 55th International Midwest Symposium on Circuits and Systems (MWSCAS) (2012)
A 1 GS/s Continuous-time Delta-Sigma modulator (CT-ΔΣM) with 31 MHz bandwidth, 76.3 dB dynamic range...
Design of Wideband Continuous-Time ΔΣ ADCs Using Two-Step Quantizers (with Sakkarapani Balagopal), IEEE 55th International Midwest Symposium on Circuits and Systems (MWSCAS) (2012)
Continuous-time delta sigma (CT-ΔΣ) ADCs are established as the data conversion architecture of choice for...
A Low-Power Single-Bit Continuous-Time ΔΣ Converter with 92.5 dB Dynamic Range for Biomedical Applications (with Sakkarapani Balagopal), Journal of Low Power Electronics and Applications (2012)
A third-order single-bit CT-ΔΣ modulator for generic biomedical applications is implemented in a 0.15 µm...
Student Mentored Work
A Prototyping Hardware Platform for ∆Σ ADCs (with Abbas AlAhmed, Mohammed AlHajji, and Zacharias Arnos), College of Engineering Poster Presentations (2011)
The project involves development of a generic test-bed for prototyping and characterizing Delta-Sigma Analog-to-Digital Converters...
Presentations
Tutorial T6: Delta-Sigma Analog-to-Digital Converters: From System Architecture to Transistor-Level Design (with Venkatesh Acharya), IEEE 55th International Midwest Symposium on Circuits and Systems (MWSCAS) (2012)
Delta-Sigma (ΔΣ) ADCs are increasingly becoming popular in mixed-signal system-on-chip (SoCs) with CMOS scaling. ΔΣ...
Dissertation
K-Delta-1-Sigma Modulators for Wideband Analog-to-Digital Conversion, Boise State University Theses and Dissertations (2010)
As CMOS technology scales, the transistor speed increases enabling higher speed communications and more complex...