Dr. Vishal Saxena graduated from the Ph.D. program in Electrical and Computer Engineering at Boise State University, and joined the faculty at Boise State in 2010. His undergraduate studies were completed at the Indian Institute of Technology in Madras, India. During his graduate studies, Dr. Saxena was a teaching assistant for CMOS Analog IC Design, Advanced Analog IC Design, Mixed-Signal IC Design, and Memory Circuit Design. His research interests include analog/mixed-signal and RF IC design, including high-speed data converters, delta-sigma modulation, phase-locked loops, and transceivers. He has been a reviewer for the IEEE Transactions on Circuits and Systems-II: Express Briefs.
Articles & Proceedings
Efficient Design and Synthesis of Decimation Filters for Wideband Delta-Sigma ADCs (with Rajaram Mohan Roy Koppula and Sakkarapani Balagopal), IEEE 24th International SOC Conference (SOCC) (2011)
A design methodology for synthesizing power-optimized decimation filters for wideband Delta Sigma (ΔΣ) analog-to-digital converters...
Systematic Design of Multi-Bit Continuous-Time Delta-Sigma Modulators Using Two-Step Quantizer (with Sakkarapani Balagopal and Rajaram Mohan Roy Koppula), IEEE 54th International Midwest Symposium on Circuits and Systems (MWSCAS) (2011)
A 500 MS/s, wideband 4th order continuous-time delta sigma modulator (CT-ΣΔM) using a two-step 5-bit...
Systematic Design of Three-Stage Op-Amps Using Split-Length Compensation (with Sakkarapani Balagopal and R. Jacob Baker), IEEE 54th International Midwest Symposium on Circuits and Systems (MWSCAS) (2011)
Over the past decade CMOS technology has been continuously scaling which has resulted in sustained...
A 110W Single-Bit Continuous-Time ΔΣ Converter with 92.5dB Dynamic Range (with Sakkarapani Balagopal and Rajaram Mohan Roy), IEEE Dallas Circuits and Systems Workshop (2010)
A third-order single-bit CT-ΔΣ modulator for generic biomedical applications is implemented in a 0.15-μm FD-SOI...
Indirect Compensation Techniques for Three-Stage Fully-Differential Op-Amps (with R. Jacob Baker), 53rd IEEE International Midwest Symposium on Circuits and Systems (2010)
As CMOS technology continues to evolve, the
supply voltages are decreasing while at the same time...
Student Mentored Work
A Prototyping Hardware Platform for ∆Σ ADCs (with Abbas AlAhmed, Mohammed AlHajji, and Zacharias Arnos), College of Engineering Poster Presentations (2011)
The project involves development of a generic test-bed for prototyping and characterizing Delta-Sigma Analog-to-Digital Converters...
Dissertation
K-Delta-1-Sigma Modulators for Wideband Analog-to-Digital Conversion, Boise State University Theses and Dissertations (2010)
As CMOS technology scales, the transistor speed increases enabling higher speed communications and more complex...