Article
The Fat-Pyramid: A Robust Network for Parallel Computation
Proceedings of the Sixth MIT Conference on Advanced Research in VLSI
Document Type
Conference Proceeding
Publication Date
4-1-1990
Pages
195-213
Publisher Name
MIT Press
Publisher Location
Cambridge, MA
Disciplines
Abstract
This paper shows that a fat-pyramid of area Theta(A) built from processors of size lg A requires only O(lg^2 A) slowdown in bit-times to simulate any network of area A under very general conditions. Specifically, there is no restriction on processor size (amount of attached memory) or number of processors in the competing network, nor is the assumption of unit wire delay required. This paper also derives upper bounds on the slowdown required by a fat-pyramid to simulate a network of larger area in the case of unit wire delay.
Identifier
0-262-04109-X
Creative Commons License
Creative Commons Attribution-Noncommercial-No Derivative Works 3.0
Copyright Statement
MIT Press ©1990
Citation Information
Ronald I. Greenberg. "The Fat-Pyramid: A Robust Network for Parallel Computation" Proceedings of the Sixth MIT Conference on Advanced Research in VLSI (1990) Available at: http://works.bepress.com/ronald-greenberg/56/
This is the author's version of the work. It is posted here by permission of MIT Press for personal use, not redistribution. The final version of the work was published in William J. Dally (Ed.). 1990. Proceedings of the Sixth MIT Conference on Advanced Research in VLSI. MIT Press, Cambridge, MA, USA. http://dl.acm.org/citation.cfm?id=101415
A revised version can be found at http://ecommons.luc.edu/cs_facpubs/100.