Novel die-stacking schema using through-wafer vias may require thick electroplated copper and aggressive first-step CMP. However, the effect of microstructural parameters, including surface orientation and grain size, on the CMP behavior of thick electroplated copper is not well understood. Here we explore the relationship between the surface orientation of copper grains and local CMP removal parameters using electron backscatter diffraction (EBSD) and atomic force microscopy (AFM) correlation techniques. EBSD is used to map crystal orientation across a large area of the sample, and AFM is subsequently used to determine relative surface heights between grains of known orientation. In the present work, aggressive CMP is performed on thick electroplated copper (30 micrometers) on silicon. In addition, solid copper disks that are annealed under varying conditions to produce samples with differing grain sizes are also studied. At the bulk level, variations in grain size and overall crystallographic texture are found to impact the removal rate and surface roughness. Furthermore, the nature of the grain boundaries (e.g. coincidence site lattice (CSL) vs. non-CSL boundaries) is shown to impact the depth of grooving at the grain boundaries. A relationship between total grain boundary length and CMP removal rate is proposed.