Low Fixed Pattern Noise Current-mode Imager Using Velocity Saturated Readout Transistors
Article comments
Copyright 2007 IEEE. Reprinted from Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS), May 2007, pages 2842-2845.
This material is posted here with permission of the IEEE. Such permission
of the IEEE does not in any way imply IEEE endorsement of any of the
University of Pennsylvania's products or services. Internal or personal
use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution must be obtained from the IEEE by writing to pubs-permissions@ieee.org. By choosing to view this document, you agree to all provisions of the copyright laws protecting it.
Abstract
This paper described a novel current-mode active pixel sensor (APS) imager. Conversion of photodiode voltage to output current is done using transistors operating in velocity saturation region. The high output impedance of this region makes it more suitable for current-sourcing operation than the linear region. The transistors also exhibit high linearity, allowing us to suppress fixed pattern noise (FPN) by correcting for both offset and gain variations among pixels. Experimental results on the fabricated 110×200 pixel array are presented. With conventional correlated double sampling (CDS), FPN is reduced from 3.8% to 0.85%. Further reduction requires compensation of gain variations, and results in a final FPN of 0.19%. A triple sampling approach is introduced to implement the described correction in hardware.Suggested Citation
Zheng Yang, Viktor Gruev, and Jan Van der Spiegel. "Low Fixed Pattern Noise Current-mode Imager Using Velocity Saturated Readout Transistors" Departmental Papers (ESE) (2007).
Available at: http://works.bepress.com/jan_vanderspiegel/33