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Low Fixed Pattern Noise Current-mode Imager Using Velocity Saturated Readout Transistors

Zheng Yang, University of Pennsylvania
Viktor Gruev, University of Pennsylvania
Jan Van der Spiegel, University of Pennsylvania

Article comments

Copyright 2007 IEEE. Reprinted from Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS), May 2007, pages 2842-2845.

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Abstract

This paper described a novel current-mode active pixel sensor (APS) imager. Conversion of photodiode voltage to output current is done using transistors operating in velocity saturation region. The high output impedance of this region makes it more suitable for current-sourcing operation than the linear region. The transistors also exhibit high linearity, allowing us to suppress fixed pattern noise (FPN) by correcting for both offset and gain variations among pixels. Experimental results on the fabricated 110×200 pixel array are presented. With conventional correlated double sampling (CDS), FPN is reduced from 3.8% to 0.85%. Further reduction requires compensation of gain variations, and results in a final FPN of 0.19%. A triple sampling approach is introduced to implement the described correction in hardware.

Suggested Citation

Zheng Yang, Viktor Gruev, and Jan Van der Spiegel. "Low Fixed Pattern Noise Current-mode Imager Using Velocity Saturated Readout Transistors" Departmental Papers (ESE) (2007).
Available at: http://works.bepress.com/jan_vanderspiegel/33