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Article
A memristor device model
IEEE Electron Device Letters
  • Chris Yakopcic, University of Dayton
  • Tarek M. Taha, University of Dayton
  • Guru Subramanyam, University of Dayton
Document Type
Article
Publication Date
9-8-2011
Abstract

This letter proposes a new mathematical model for memristor devices. It builds on existing models and is correlated against several published device characterizations. This letter identifies significant discrepancies between the existing models and published device characterization data. The proposed model addresses these discrepancies. In particular, it allows modeling of memristor-based neuromorphic systems.

Inclusive pages
1436 - 1438
ISBN/ISSN
0741-3106
Comments

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Publisher
IEEE
Peer Reviewed
Yes
Keywords
  • memristors;semiconductor device models;memristor device model;memristor-based neuromorphic system;Conductivity;Integrated circuit modeling;Mathematical model;Memristors;Neuromorphics;Simulation;Threshold voltage;Device model;memristive;memristor;simulation
Citation Information
Chris Yakopcic, Tarek M. Taha and Guru Subramanyam. "A memristor device model" IEEE Electron Device Letters Vol. 32 Iss. 10 (2011)
Available at: http://works.bepress.com/guru_subramanyam/19/