Elaboration d’éléments optimisés de commandes vectorielles d’une machine asynchrone avec leurs implémentations sur un circuit à architecture reconfigurable de type FPGA
Abstract
In the present work we suggest the application of ANN and ANFIS to design optimized controllers able to imitate the behaviour of fuzzy controllers for the control if optimized . These controllers must satisfy some technological requirements such as: fastness, efficiency and simplicity. In fact, fuzzy controller with seven fuzzy sets provides good static and dynamic performances. However, they are complex in point of view of implementation and have a series date processing. In another hand, the use of modern circuits with configurable architecture allows to overcome the previous limitations. These circuits fit perfectly when used to implement the vector control of induction motors. This is due to their low cost, their high integration density and In the present work we suggest the application of ANN and ANFIS to design optimized controllers able to imitate the behaviour of fuzzy controllers for the control if induction motor’s speed. These controllers must satisfy some technological requirements such as: fastness, efficiency and simplicity. In fact, fuzzy controller with seven fuzzy sets provides good static and dynamic performances. However, they are complex in point of view of implementation and have a series date processing. In another hand, the use of modern circuits with configurable architecture allows to overcome the previous limitations. These circuits fit perfectly when used to implement the vector control of induction motors. This is due to their low cost, their high integration density and flexibility to their configuration. In this work, we have implemented the SVM using the FPGA. The algorithm is based on the sector selection using three base equations to obtain the conduction cycles. The implementation has been done by high level software known as Xilinx Generator System.
Suggested Citation
Bradai Rafik. "Elaboration d’éléments optimisés de commandes vectorielles d’une machine asynchrone avec leurs implémentations sur un circuit à architecture reconfigurable de type FPGA" - (- ed). Ed. Boumerdès University. -: -, 2007. ---.